Conventionally, semiconductor memory devices such as flash memories have been fabricated by two-dimensionally integrating memory cells on the surface of a silicon substrate. In this type of semiconductor memory device, reduction of cost per bit and increase in memory capacity require increase in the packaging density of memory cells. However, recently, such increase in packaging density has been difficult in terms of cost and technology.
Methods of stacking memory cells for three-dimensional integration are known as techniques for breaking through the limit to increase in packaging density. However, in the method of simply stacking and processing layer by layer, increase in the number of stacked layers results in increasing the number of processes and increasing cost. In this context, the following technique is proposed. Electrode films made of silicon and insulating films made of silicon oxide are alternately stacked on a silicon substrate to form a stacked body. Then, through holes are formed in this stacked body by collective processing. A block insulating film, a charge storage film, and a tunnel insulating film are deposited in this order on the side surface of the through hole. Furthermore, a silicon pillar is buried inside the through hole (for instance, refer to JP-A 2009-146954(Kokai)).